A Survey on ESD protection design in different RF circuits
Keywords:
ESD, RF circuits, RF, IC, CMOS, I/O Pad, HBM, CDMAbstract
ESD (electrostatic discharge) protection circuits are always needed in any of the RF circuits to protect the circuit from electrostatic discharge. There are different types of ESD protection circuits. It is very important to protect the circuit from CMOS devices. In this review we have discussed ESD protection design in different RF circuits through different papers. In introduction part we have discussed causes of ESD. The problem is also discussed in the paper at the conclusion point.
References
[1]. Garrett, H. B., & Whittlesey, A. C. (2000). Spacecraft charging, an update. IEEE transactions on plasma science, 28(6), 2017-2028.
[2]. Dong, A. (2018). Design of Low-Capacitance Electrostatic Discharge (ESD) Protection Devices in Advanced Silicon Technologies.
[3]. Wang, A. Z., Feng, H., Zhan, R., Xie, H., Chen, G., Wu, Q., ... & Zhang, C. (2005). A review on RF ESD protection design. IEEE Transactions on Electron Devices, 52(7), 1304-1311.
[4]. Wang, C., Wang, X. S., Zhang, F., Li, C., Di, M., & Wang, A. (2018, April). ESD and RF switch co-design in SOI CMOS for smartphones from 2G to 5G. In 2018 Texas Symposium on Wireless and Microwave Circuits and Systems (WMCS) (pp. 1-4). IEEE.
[5]. Lin, C. Y., Chu, L. W., Tsai, S. Y., Ker, M. D., Lu, T. H., Hsu, T. L., ... & Tsai, M. H. (2011, August). Modified LC-tank ESD protection design for 60-GHz RF applications. In 2011 20th European Conference on Circuit Theory and Design (ECCTD)(pp. 57-60). IEEE.
[6]. Dong, A., Li, H., Sundaram, K., He, L., Parthasarathy, S., Salcedo, J. A., ... & Luo, S. (2018, July). Distributed ESD Protection Network for Millimetre-Wave RF Applications. In 2018 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) (pp. 1-5). IEEE.
[7]. Richier, C., Salome, P., Mabboux, G., Zaza, I., Juge, A., & Mortini, P. (2000, September). Investigation on different ESD protection strategies devoted to 3.3 V RF applications (2 GHz) in a 0.18/spl mu/m CMOS process. In Electrical Overstress/Electrostatic Discharge Symposium Proceedings 2000 (IEEE Cat. No. 00TH8476) (pp. 251-259). IEEE.
[8]. Duan, J., Wang, Z., & Li, Z. (2008, November). A fully integrated LNA for 3-5 GHz UWB wireless applications in 0.18-μm CMOS technology. In 2008 8th International Symposium on Antennas, Propagation and EM Theory (pp. 1274-1277). IEEE.
[9]. Chu, L. W., Lin, C. Y., Tsai, S. Y., Ker, M. D., Song, M. H., Jou, C. P., ... & Hung, P. F. (2012, May). Compact and low-loss ESD protection design for V-band RF applications in a 65-nm CMOS technology. In 2012 IEEE International Symposium on Circuits and Systems (pp. 2127-2130). IEEE.
[10]. Chen, G., Feng, H., Xie, H., Zhan, R., Wu, Q., Guan, X., ... & Zhang, C. (2004). Characterizing diodes for RF ESD protection. IEEE Electron Device Letters, 25(5), 323-325.
[11]. Wang, W., Dong, S., Zhong, L., Zeng, J., Yu, Z., & Liu, Z. (2014, June). GGNMOS as ESD protection in different nanometer CMOS process. In 2014 IEEE International Conference on Electron Devices and Solid-State Circuits (pp. 1-2). IEEE.
[12]. Richier, C., Salome, P., Mabboux, G., Zaza, I., Juge, A., & Mortini, P. (2000, September). Investigation on different ESD protection strategies devoted to 3.3 V RF applications (2 GHz) in a 0.18/spl mu/m CMOS process. In Electrical Overstress/Electrostatic Discharge Symposium Proceedings 2000 (IEEE Cat. No. 00TH8476) (pp. 251-259). IEEE.
[13]. Chen, J. T., Lin, C. Y., Chang, R. K., & Ker, M. D. (2018). On-Chip HBM and HMM ESD Protection Design for RF Applications in 40-nm CMOS Process. IEEE Transactions on Electron Devices, 65(12), 5267-5274.
[14]. Semenov, O., Sarbishaei, H., & Sachdev, M. (2008). ESD protection device and circuit design for advanced CMOS technologies. Springer Science & Business Media.
[2]. Dong, A. (2018). Design of Low-Capacitance Electrostatic Discharge (ESD) Protection Devices in Advanced Silicon Technologies.
[3]. Wang, A. Z., Feng, H., Zhan, R., Xie, H., Chen, G., Wu, Q., ... & Zhang, C. (2005). A review on RF ESD protection design. IEEE Transactions on Electron Devices, 52(7), 1304-1311.
[4]. Wang, C., Wang, X. S., Zhang, F., Li, C., Di, M., & Wang, A. (2018, April). ESD and RF switch co-design in SOI CMOS for smartphones from 2G to 5G. In 2018 Texas Symposium on Wireless and Microwave Circuits and Systems (WMCS) (pp. 1-4). IEEE.
[5]. Lin, C. Y., Chu, L. W., Tsai, S. Y., Ker, M. D., Lu, T. H., Hsu, T. L., ... & Tsai, M. H. (2011, August). Modified LC-tank ESD protection design for 60-GHz RF applications. In 2011 20th European Conference on Circuit Theory and Design (ECCTD)(pp. 57-60). IEEE.
[6]. Dong, A., Li, H., Sundaram, K., He, L., Parthasarathy, S., Salcedo, J. A., ... & Luo, S. (2018, July). Distributed ESD Protection Network for Millimetre-Wave RF Applications. In 2018 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) (pp. 1-5). IEEE.
[7]. Richier, C., Salome, P., Mabboux, G., Zaza, I., Juge, A., & Mortini, P. (2000, September). Investigation on different ESD protection strategies devoted to 3.3 V RF applications (2 GHz) in a 0.18/spl mu/m CMOS process. In Electrical Overstress/Electrostatic Discharge Symposium Proceedings 2000 (IEEE Cat. No. 00TH8476) (pp. 251-259). IEEE.
[8]. Duan, J., Wang, Z., & Li, Z. (2008, November). A fully integrated LNA for 3-5 GHz UWB wireless applications in 0.18-μm CMOS technology. In 2008 8th International Symposium on Antennas, Propagation and EM Theory (pp. 1274-1277). IEEE.
[9]. Chu, L. W., Lin, C. Y., Tsai, S. Y., Ker, M. D., Song, M. H., Jou, C. P., ... & Hung, P. F. (2012, May). Compact and low-loss ESD protection design for V-band RF applications in a 65-nm CMOS technology. In 2012 IEEE International Symposium on Circuits and Systems (pp. 2127-2130). IEEE.
[10]. Chen, G., Feng, H., Xie, H., Zhan, R., Wu, Q., Guan, X., ... & Zhang, C. (2004). Characterizing diodes for RF ESD protection. IEEE Electron Device Letters, 25(5), 323-325.
[11]. Wang, W., Dong, S., Zhong, L., Zeng, J., Yu, Z., & Liu, Z. (2014, June). GGNMOS as ESD protection in different nanometer CMOS process. In 2014 IEEE International Conference on Electron Devices and Solid-State Circuits (pp. 1-2). IEEE.
[12]. Richier, C., Salome, P., Mabboux, G., Zaza, I., Juge, A., & Mortini, P. (2000, September). Investigation on different ESD protection strategies devoted to 3.3 V RF applications (2 GHz) in a 0.18/spl mu/m CMOS process. In Electrical Overstress/Electrostatic Discharge Symposium Proceedings 2000 (IEEE Cat. No. 00TH8476) (pp. 251-259). IEEE.
[13]. Chen, J. T., Lin, C. Y., Chang, R. K., & Ker, M. D. (2018). On-Chip HBM and HMM ESD Protection Design for RF Applications in 40-nm CMOS Process. IEEE Transactions on Electron Devices, 65(12), 5267-5274.
[14]. Semenov, O., Sarbishaei, H., & Sachdev, M. (2008). ESD protection device and circuit design for advanced CMOS technologies. Springer Science & Business Media.
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Published
2019-07-29
How to Cite
Ramteke, M., Nisha, R., & Gupta, S. (2019). A Survey on ESD protection design in different RF circuits. CSVTU Research Journal, 8(1), 39–44. Retrieved from https://csvtujournal.in/index.php/rjet/article/view/63
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