NISHA, R.; DWIVEDI, P.; RAMTEKE, M. Study on Leakage Current Reduction Technique in VLSI Design. CSVTU Research Journal, [S. l.], v. 8, n. 1, p. 45–55, 2019. Disponível em: https://csvtujournal.in/index.php/rjet/article/view/47. Acesso em: 12 sep. 2025.